Problem 16
Route a 100 MHz source-synchronous bus on L1 over an L2 ground pour, clear of a fixed aggressor.
- L1 over L2 ground, clear of the fixed aggressor, within the via limit.
- Match length to the clock within the stated skew.
Context
An aggressor is a neighboring net whose edge can couple into yours. Stay on the layer that faces the ground pour. A stitch via is a ground via near a transition, not an extra signal via. Leaving the reference layer to dodge the aggressor is not the intended fix.
Components on this challenge
- Aggressor. A neighboring net whose edge can couple into the net you are routing.
- Stitch via. A ground via that keeps the return close when the geometry changes.
Full brief
Keep the fast traces on the layer that faces ground, outside the stated gap from the aggressor, and inside the via budget. This is a geometry rule, not a field solution.
How PCBGrade measures this
Board 100 × 50 mm, four layers. 100 MHz is context for why the limits exist. This problem does not grade impedance, timing closure, an eye diagram, or a field solution. J1 is the driver and J2 is the receiver. Both are 1×5 headers, locked. Pin 1 is CLK, then D0, D1, D2, and D3. Straight pad-to-pad distance is 60 mm. Ja and Jb are locked. Ja pin 1 to Jb pin 1 is the pre-routed aggressor on L1 and must remain; deleting it fails the spacing rule. Ja pin 2 and Jb pin 2 are GND so a stitch via has a ground pad. Connecting those two GND pins is not a separate score. All five bus nets are routed on L1 (F.Cu) only. Length is pad centre to pad centre along copper. Zones do not count, and a stub off the shortest path does not count. Each net is ≤ 70.0 mm (7 points each, 35). |L(Dn) − L(CLK)| ≤ 5.0 mm, referenced to CLK, not pairwise. A net that is open scores 0 for that net. L2 (In1.Cu) GND reference uses the same centreline sample as Problem 13, every 0.010 mm, combined across CLK and D0–D3. The requirement is ≥ 0.95 (25). A trace on L2 itself counts as uncovered. A through-hole pad of another net sits on L2 and uncovers the centreline samples inside that pad, so the two header pads take about 0.85 mm off each end of a 60 mm run before the pour gap is counted. Close coupling is edge-to-edge, cumulative per victim, pads ignored. A sample is close only when the gap is strictly under 0.75 mm; exactly 0.75 mm is not close. The close length on each victim must be ≤ 10.0 mm (15). A run shorter than that limit can be closer than 0.75 mm and still pass. There is no angle tolerance. Any bus copper off L1 fails (5). The correct route uses no signal via. A signal via you add must be ≤ 1 on that net (5) and must have a through GND via within 2.0 mm centre-to-centre (5). Zero signal vias passes the stitch rule. One GND via may serve more than one signal via. A GND via inside a signal-via anti-pad is a clearance failure, not a stitch. DRC (10) is width ≥ 0.25 mm, clearance ≥ 0.20 mm, and copper-to-edge ≥ 0.50 mm. There is no extra score cap. One missed category can still leave the board at or above 70. A stitch via is through from F.Cu to B.Cu. A via that meets GND only by sitting in an unfilled pour is not a GND via. A pour of a bus net off L1 fails that rule the same way a trace does.
- length/skew · 35 pts
- reference path · 25 pts
- spacing/crosstalk-rule compliance · 20 pts
- via/stitch rules · 10 pts
- DRC · 10 pts
- Cap 69: Copper outside the outline cannot pass, and neither can a short between nets.