Upload a .PcbDoc directly

PCBGrade reads the outline, layers, components, pads, nets, tracks, vias, arcs, and poured copper. The result is clearance, width, drill, and connectivity.

• Short circuit

  Pads of different nets joined by tracks, vias, or other pads.

• Unrouted net

  Pads that share a net in the file but are not joined by copper. A KiCad or IPC-2581 pour does not count. A native .PcbDoc pour that has filled geometry does.

• Minimum track width

  Runs when a KiCad or IPC-2581 Default net class, or a .PcbDoc board rule, states a track width.

• Clearance

  Runs when a KiCad or IPC-2581 Default net class, or a .PcbDoc board rule, states a clearance. Same-footprint pads are not compared with each other.

• Copper outside the board

  Tracks, vias, and pads that leave the outline. A native .PcbDoc cutout is not board area.

• Copper to edge

  Runs only when the file states a copper-to-edge limit.

• Minimum drill

  Runs when a KiCad or IPC-2581 Default net class, or a .PcbDoc board rule, states a via drill. That drill is the minimum.

• Via diameter

  Runs when a KiCad or IPC-2581 Default net class, or a .PcbDoc board rule, states a via diameter.

• Annular ring

  Runs only when the file states a minimum annular ring.

• Zero-length track

  A track whose ends are the same point.

• Duplicate track

  Two tracks with the same net, layer, and endpoints. Other overlapping copper of one net is not a separate finding.

• .PcbDoc. Upload the board file. No export step.
• KiCad. A .kicad_pcb board.
• IPC-2581. A fabrication export, including a zip that contains the XML.

IPC-2581 is optional. Use it when you already have a fabrication export and not the .PcbDoc.

1. In Altium Designer, open the PCB.
2. Choose File → Fabrication Outputs → IPC-2581.
3. Set units to millimeters and include the board step, components, nets, and conductor layers.
4. Save the XML (often .xml or .cvg). A zip that contains that XML is also accepted.
5. Upload that file here if you want the fabrication export instead of the .PcbDoc.

• Decoupling proximity. Needs a declared supply pin and a capacitor role. A net name alone does not say which pad is the pin.
• Return continuity. Needs to know which nets are fast and which copper is their reference. The file’s geometry does not say that.
• Differential skew and spacing. Needs a declared pair. Two nearby traces are not a pair until the design says so.
• Hot-loop geometry. Needs the switch node, the input capacitor, and the catch device identified. Those roles are not in the copper.
• Thermal copper. Needs a current and a heatsink net. Width without those is not a temperature.

• A full KiCad project, including the schematic, libraries, and project file.
• Schematic-only netlist grading.
• A score for a generic upload. A score exists only when a professor rubric names the checks and their points.
• KiCad and IPC-2581 copper zones as filled connectivity. Those pours are drawn and counted, and a net joined only by one is reported unrouted. A native .PcbDoc pour with filled geometry is copper.
• Altium records this parser does not decode. A .PcbDoc result names them. The tested container is the PCB 6.0 binary stream layout, not every Altium Designer release.
• Gerber, NC drill, and ODB++ as a connectivity review. Those files do not carry the nets this check requires.
• KiCad arc tracks and curved Edge.Cuts. An IPC-2581 arc, and a native .PcbDoc arc, are checked as straight segments whose chord is at most 0.05 mm.
• Placement, decoupling, return path, differential pairs, and SI/PI/EMI.
• Manufacturing checks beyond the copper rules above: solder mask, silkscreen, courtyard, and hole-to-hole.

• Oval pads are checked as circles, and round rectangles as rectangles. A reported gap can be tighter than the manufactured pad.
• KiCad and IPC-2581 track width, clearance, via diameter, and drill use the Default net class only. A .PcbDoc uses one board-wide rule when the file states it.
• Copper-to-edge and annular ring run only when the file states the limit. This check does not invent one.
• The copper order comes from the file. Thickness is reported and is not used for impedance or resistance.